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| PD -95314A l l l l l l l l Ultra Low On-Resistance P-Channel Surface Mount (IRFR5410) Straight Lead (IRFU5410) Advanced Process Technology Fast Switching Fully Avalanche Rated Lead-Free HEXFET(R) Power MOSFET D IRFR5410PBF IRFU5410PbF VDSS = -100V G S RDS(on) = 0.205 ID = -13A Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-Pak TO-252AA I-Pak TO-251AA Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C V GS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. -13 -8.2 -52 66 0.53 20 194 -8.4 6.3 -5.0 -55 to + 150 300 (1.6mm from case ) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount)** Junction-to-Ambient Typ. Max. 1.9 50 110 Units C/W www.irf.com 1 12/13/04 IRFR/U5410PbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance V(BR)DSS IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -100 -2.0 3.2 Typ. -0.12 15 58 45 46 4.5 7.5 760 260 170 Max. Units Conditions V VGS = 0V, ID = -250A V/C Reference to 25C, ID = -1.0mA 0.205 VGS = -10V, I D = -7.8A -4.0 V VDS = VGS, ID = -250A S VDS = -50V, ID = -7.8A -25 VDS = -100V, VGS = 0V A -250 VDS = -80V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 58 ID = -8.4A 8.3 nC VDS = -80V 32 VGS = -10V, See Fig. 6 and 13 VDD = 50V ID = -8.4A ns RG = 9.1 RD =6.2, See Fig. 10 D Between lead, 6mm (0.25in.) nH G from package and center of die contact S VGS = 0V pF VDS = -25V = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM V SD t rr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol -13 showing the A G integral reverse -52 p-n junction diode. S -1.6 V TJ = 25C, IS = -7.8A, VGS = 0V 130 190 ns TJ = 25C, IF = -8.4A 650 970 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 6.4mH RG = 25, IAS = -7.8A. (See Figure 12) ISD -7.8A, di/dt 200A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%. This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact Uses IRF9530N data and test conditions. ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 2 www.irf.com IRFR/U5410PbF 100 -I D , Drain-to-Source Current (A) 10 -I D , Drain-to-Source Current (A) VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP 100 VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP 10 1 -4.5V 0.1 1 -4.5V 0.01 0.1 20s PULSE WIDTH TJ = 25 C 1 10 100 0.1 0.1 1 20s PULSE WIDTH TJ = 150 C 10 100 -VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 2.5 -I D , Drain-to-Source Current (A) TJ = 25 C RDS(on) , Drain-to-Source On Resistance (Normalized) ID = -14A 2.0 10 TJ = 150 C 1.5 1.0 1 0.5 0.1 4 5 6 7 V DS = 10V 20s PULSE WIDTH 8 9 10 0.0 -60 -40 -20 V GS = -10V 0 20 40 60 80 100 120 140 160 -VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRFR/U5410PbF 2000 1600 -VGS , Gate-to-Source Voltage (V) V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd 20 ID = -8.4A VDS = -80V VDS = -50V VDS = -20V C, Capacitance (pF) 15 1200 Ciss 10 800 Coss Crss 5 400 0 1 10 100 0 FOR TEST CIRCUIT SEE FIGURE 13 0 10 20 30 40 50 60 A -VDS , Drain-to-Source Voltage (V) QG, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 -ISD , Reverse Drain Current (A) TJ = 150 C OPERATION IN THIS AREA LIMITED BY RDS(on) 10 -ID , Drain Current (A) I 100 10us TJ = 25 C 1 10 100us 0.1 0.2 V GS = 0 V 0.8 1.4 2.0 2.6 1 1 TC = 25 C TJ = 150 C Single Pulse 10 1ms 10ms 100 1000 -VSD ,Source-to-Drain Voltage (V) -VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRFR/U5410PbF 15 VDS VGS RD 12 -ID , Drain Current (A) 9 -10V Pulse Width 1 s Duty Factor 0.1 % 6 Fig 10a. Switching Time Test Circuit 3 td(on) tr t d(off) tf VGS 0 25 50 75 100 125 150 10% TC , Case Temperature ( C) 90% VDS Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 0.01 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com + - RG D.U.T. VDD 5 IRFR/U5410PbF VDS L 500 EAS , Single Pulse Avalanche Energy (mJ) RG D.U.T IAS -V V DD + DD A DRIVER 400 ID -3.5A -4.9A BOTTOM -7.8A TOP -20V tp 0.01 300 15V 200 Fig 12a. Unclamped Inductive Test Circuit I AS 100 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) tp V(BR)DSS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F VG VGS -3mA Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com + QGS QGD D.U.T. - -10V VDS IRFR/U5410PbF Peak Diode Recovery dv/dt Test Circuit D.U.T* + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS www.irf.com 7 IRFR/U5410PbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR120 WITH ASSEMBLY LOT CODE 1234 ASSEMBLED ON WW 16, 1999 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "Lead-Free" PART NUMBER INTERNATIONAL RECTIFIER LOGO IRFU120 12 916A 34 ASSEMBLY LOT CODE DATE CODE YEAR 9 = 1999 WEEK 16 LINE A OR PART NUMBER INTERNATIONAL RECTIFIER LOGO IRFU120 12 34 DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = ASSEMBLY SITE CODE ASSEMBLY LOT CODE 8 www.irf.com IRFR/U5410PbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information EXAMPLE: T HIS IS AN IRFU120 WIT H AS S EMB LY LOT CODE 5678 AS S EMBLED ON WW 19, 1999 IN T HE AS S EMB LY LINE "A" Note: "P" in as sembly line position indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO PART NUMB ER IRF U120 919A 56 78 ASS EMB LY LOT CODE DAT E CODE YEAR 9 = 1999 WEEK 19 L INE A OR INTERNAT IONAL RECTIF IER LOGO PART NUMBER IRFU120 56 78 AS S EMBLY LOT CODE DATE CODE P = DES IGNATES LEAD-FREE PRODUCT (OPTIONAL ) YEAR 9 = 1999 WEEK 19 A = AS S EMBL Y S IT E CODE www.irf.com 9 IRFR/U5410PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 ( .641 ) 15.7 ( .619 ) 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04 10 www.irf.com |
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